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FAN6747 -- Highly Integrated Green-Mode PWM Controller
January 2010
FAN6747 Highly Integrated Green-Mode PWM Controller
Features
High-Voltage JFET Startup AC-Line Brownout Protection by HV Pin Constant Output Power Limit by HV Pin (Full AC-Line Range) Two-Level Over-Current Protection (OCP) with 220ms Delay Short-Circuit Protection (SCP) with 15ms Delay as Output Short Peak-Current Mode Operation with Cycle-by-Cycle Current Limiting Low Startup Current: 30A Low Operating Current: 1.7mA Over-Temperature Protection (OTP) with an External Negative-Temperature-Coefficient (NTC) Thermistor PWM Frequency Decreasing at Green-Mode VDD Over-Voltage Protection (OVP) Internal Latch Circuit for OVP, OTP, SCP, and OCP
Description
The highly integrated FAN6747 PWM controller provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to decrease the switching frequency with load condition. Under zero-load condition, the power supply enters burst mode and burst frequency can be low to save more power. Green-mode function enables the power supply to meet international power conservation requirements. The FAN6747 is especially designed for SMPS with peak-current output. It incorporates a cycle-by-cycle current limiting and two-level Over-Current-Protection (OCP) that can handle peak load with a delay time. Once the current is over the threshold level, it triggers the first counter 15ms and checks if VDD is below 10V; if it is, the PWM latches off for SCP. If VDD is higher than 10V; it keeps counting to 220ms, then the PWM latches off for OCP. FAN6747 also integrates a frequency-hopping function internally to help reduce EMI emission of a power supply with minimum line filters. Built-in proprietary internal synchronized slope compensation achieves constant output power limit over universal AC line range. The gate output is clamped at 14V to protect the external MOSFET from over-voltage damage. Other protection functions include AC-line brownout protection with hysteresis and VDD over-voltage protection. For over-temperature protection, an external NTC thermistor can be applied to sense the ambient temperature. When OCP, OVP, SCP, or OTP is activated, an internal latch circuit latches off the controller. The latch is reset when the VDD supply is removed.
Applications
General-purpose switch-mode power supplies and flyback power converters, including: Power Adapters SMPS with Peak-Current Output, such as for Printers, Scanners, Motor Drivers AC/DC NB Adapters Open-Frame SMPS
Ordering Information
Part Number
FAN6747LMY
Operating Temperature Range
-40 to +105C
Eco Status
Green
Package
8-Lead, Small-Outline Integrated Circuit (SOIC), JEDEC MS-012, .15-Inch Narrow Body
Packing Method
Tape & Reel
For Fairchild's definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Application Diagram
Figure 1. Typical Application
Internal Block Diagram
HV 4
Line Voltage Sample Circuit SCP OVP OTP OCP Latch Protection
NC 3
Brownout Protection
HV Start-up
Soft Driver
Vlimit Adjustment
Internal BIAS Q S R PWM Comparator
8
GATE
VDD
7
UVLO
OSC
Green Mode
5.2V
16.5V/9V
3R
2
Debounce OVP Soft-start Circuit Current Limit Comparator SCP IRT 1R Slope Compensation Blanking Circuit
FB
VDD-OVP
6
SENSE
VDD-SCP
Debounce1 1.05V Debounce2 0.7V OLP Comparator 4.6V SCP Delay OTP OCP OCP Delay OCP Comparator
RT
5
GND
Figure 2. Functional Block Diagram
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1 www.fairchildsemi.com 2
FAN6747 -- Highly Integrated Green-Mode PWM Controller
Marking Information
: Fairchild Logo Z: Plant Code X: Year Code Y: Week Code TT: Die Run Code F: L = OCP latch T: Package Type (N =DIP, M = SOP) P: Y = Green Compound M: Manufacturing Flow Code Figure 3. Top Mark
ZXYTT 6747F TPM
Pin Configuration
Figure 4. Pin Assignments
Pin Definitions
Pin #
1 2 3
Name
GND FB NC
Description
Ground. This pin is used for the ground potential of all the pins. A 0.1F decoupling capacitor placed between VDD and GND is recommended. Feedback. The output voltage feedback information from the external compensation circuit is fed into this pin. The PWM duty cycle is determined from this pin and the current-sense signal from Pin 6. No Connection. High-Voltage Startup. This pin is connected to the line input via diodes and resistors to achieve brownout and high/low line compensation. Once the voltage of the HV pin is lower than the brownout voltage, PWM output is turned off. High/low line compensation dominates the OCP level and cycle-by-cycle current limit, to solves the unequal OCP level and power limit problem under universal input. Over-Temperature Protection. For over-temperature protection, an external NTC thermistor is connected from this pin to GND. The impedance of the NTC decreases at high temperatures. Once the voltage of the RT pin drops below the threshold voltage, the controller latches off the PWM. Current Sense. This pin is used to sense the MOSFET current for the current mode PWM and OCP. If the switching current is higher than OCP threshold and lasts 220ms, the controller latches off the PWM. Supply Voltage. IC operating current and MOSFET driving current are supplied using this pin. This pin is connected to an external bulk capacitor of typically 10F. The threshold voltages for startup and turn-off are 16.5V and 9V, respectively. The operating current is lower than 2mA. Gate Driver Output. The totem-pole output driver for the power MOSFET. It is internally clamped below 14V.
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4
HV
5
RT
6
SENSE
7 8
VDD GATE
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
FAN6747 -- Highly Integrated Green-Mode PWM Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VDD VHV VL PD JA TJ TSTG TL ESD DC Supply Voltage
Parameter
Suddenly Input Voltage to HV Pin within 1 Second (Series connect with RHV) Input Voltage to FB, SENSE, RT Pin Power Dissipation (TA<50C) Thermal Resistance (Junction-to-Ambient) Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 Seconds) Electrostatic Discharge Capability, All Pins Except HV Pin Human Body Model, JESD22-A114 Charge Device Model, JESD22-C101
Min.
Max.
30 640
Unit
V V V mW C/W C C C kV
-0.3
7.0 400 141
-40 -55
+125 +150 +260 4.50 1.5
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to the network ground terminal.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA VHV RHV
Parameter
Operating Ambient Temperature Input Voltage to HV Pin HV Startup Resistor
Conditions
Min.
-40 150
Typ.
Max.
+105 500
Unit
C V k
200
250
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V and TA=25C, unless otherwise specified.
Symbol VDD Section
VOP VDD-ON VDD-OFF VDD-OLP VDD-LH VDD-AC VDD-SCP ILH IDD-ST IDD-OLP IDD-OP1 IDD-OP2 VDD-OVP tD-OVP
Parameter
Continuously Operating Voltage Turn-On Threshold Voltage PWM Turn-Off Threshold Voltage Threshold Voltage on VDD for HV JFET Turn-On in Protection Condition Threshold Voltage on VDD Pin for Latch-Off Release Voltage Threshold Voltage on VDD Pin for Disable AC Recovery to Avoid Startup Failed
Conditions
Min.
Typ.
Max.
24
Units
V V V V V V V A A A mA mA V s
15.5 8 After Trigger OCP/ SCP/ OVP/ OTP 5.5 3.5 VDD-OFF +2.5 VDD-OFF +0.5 80
16.5 9 6.5 4.0 VDD-OFF +3.0 VDD-OFF +1.0 100
17.5 10 7.5 4.5 VDD-OFF +3.5 VDD-OFF +1.5 120 30
Threshold Voltage on VDD Pin for VFB > VFBO Short-Circuit Protection (SCP) Holding Current Under Latch-Off Conduction Startup Current Holding Current at PWM-Off Phase Operating Supply Current when PWM Operating Operating Supply Current when PWM Stop Threshold Voltage on VDD Pin for VDD Over-Voltage Protection (Latch-Off) VDD OVP Debounce Time VFB > VFB-N VDD=5V VDD-ON - 0.16V VDD-OLP+0.1V VDD=20V, VFB=3V Gate Open VDD=20V, VFB=3V Gate Open
235
270 1.7 1.2
305 2.0 1.5 26 245
24 75
25 160
Figure 5. UVLO Specification
Continued on the following page...
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V and TA=25C, unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Figure 6. Normal UVLO and Two-Step UVLO Behavior
HV Section
IHV VIN-OFF VIN-ON VIN tS-CYCLE tS-TIME tD_VIN-OFF Supply Current Drawn from HV Pin PWM Turn-Off Threshold PWM Turn-On Threshold Change in VIN, VIN-ON - VIN-OFF Line Voltage Sample cycle Line Voltage Sample Period PWM Turn-Off Debounce Time VFB > VFB-N VFB < VFB-G 65 180 VHV=120V, VDD=0V DC Source Series R=200k to HV Pin DC Source Series R=200k to HV Pin DC Source Series R=200k to HV Pin VFB > VFB-N VFB < VFB-G 1.50 92 104 6 170 450 2.75 102 114 12 205 615 20 75 235 85 290 4.00 112 124 18 240 780 s ms ms mA V V V s
Figure 7. Brownout Circuit
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V and TA=25C, unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Figure 8. Brownout Behavior
Figure 9. VDD-AC and AC Recovery
Oscillator Section
fOSC tJTR-1 tJTR-3 fOSC-G Normal PWM Frequency Jitter Period 1 Jitter Period 3 Green-Mode Minimum Frequency FB Threshold Voltage for Frequency Reduction Beginning Pin, FB Voltage (VFB=VFB-N), fOSC - 5KHz Jitter Range VFB-G FB Threshold Voltage for Turn-Off Pin, FB Voltage (VFB=VFB-G) Jitter and Frequency Reduction Destination Jitter Range
7
Center Frequency (VFB>VFB-N) VFB > VFB-N VFB=VFB-G
61 3.9 10.2 19 2.6 3.7 2.1
65 4.4 11.5 22 2.8 4.2 2.3 1.45
69 4.9 12.8 25 3.0 4.7 2.5
kHz ms ms kHz V kHz V kHz
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VFB-N
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
FAN6747 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V and TA=25C, unless otherwise specified.
Symbol
SG VOZ-ON VFB-ZDC (VOZ-OFF) VOZ-ON - VOZ-OFF fDV fDT
Parameter
Slope for Green-Mode Modulation FB Threshold Voltage for ZeroDuty Recovery FB Threshold Voltage for ZeroDuty FB Voltage Hysteresis for VOZ-ON to VOZ-OFF Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation
Conditions
Min.
Typ.
85
Max.
Units
Hz/mV-
1.6 1.5 50 VDD=12V to 22V TA=-40 to 105C
1.8 1.7 100
2.0 1.9 150 5 5
V V mV % %
Figure 10. PWM Frequency
Figure 11. Burst-Mode Diagram
Feedback Input Section
AV ZFB VFBO VFB-OLP tD-OLP Input-Voltage to Current-Sense Attenuation Input Impedance FB Pin Open Voltage FB Open-Loop Protection Threshold Voltage Open-Loop Protection Delay
8
VFB < VFB-G
1/4.5 13.4 4.8 4.3 190
1/4.0 15.5 5.0 4.6 215
1/3.5 17.6 5.2 4.9 240
V/V k V V ms
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(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
FAN6747 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V and TA=25C, unless otherwise specified.
Symbol
tPD tLEB Vlimit-L Vlimit-H VOCP-L VOCP-H tSOFT-START tD-OCP tD-SCP
Parameter
Delay to Output Leading-Edge Blanking Time Current Limit at Low Line (VAC-RMS=86V) Current Limit at High Line (VAC-RMS=259V) OCP Trigger Level at Low Line (VAC-RMS=86V) OCP Trigger Level at High Line (VAC=259V) Period During Startup Delay Time for Output OCP Delay Time for Output SCP
Conditions
Min.
Typ.
65
Max.
200 310 0.860 0.760 0.510 0.450 9 240 18
Units
ns ns V V V V ms ms ms
Current Sense Section
230 VDC=122V, Series R=200k to HV VDC=366V, Series R=200k to HV VDC=122V, Series R=200k to HV VDC=366V, Series R=200k to HV Startup Time VCS>VOCP VCS>VOCP and VDD< VDD-SCP 0.790 0.690 0.450 0.390 7 190 12 270 0.825 0.725 0.480 0.420 8 215 15
PWM Output Section
DCYMAX VOL VOH tR tF VCLAMP Maximum Duty Cycle Output Voltage Low Output Voltage High Rising Time Falling Time Gate Output Clamping Voltage VDD = 15V, IO=50mA VDD = 12V, IO=50mA GATE=1nF GATE=1nF VDD=22V 11.0 8 95 30 13.5 16.0 88.0 89.5 91.0 1.5 % V V ns ns V
Over-Temperature Protection Section
IRT VOTP-LATCHOFF
Output Current of RT Pin Threshold Voltage for OverTemperature Protection Over-Temperature Latch-Off Debounce Second Threshold Voltage for Over-Temperature Protection Second Over-Temperature Latch-Off Debounc VFB > VFB-N VFB < VFB-G VFB > VFB-N VFB < VFB-G
92 1.00 14 40 0.65 110 320
100 1.05 16 51 0.70 185 605
108 1.10 18 62 0.75 260 890
A V ms ms V s
tD_OTP-LATCH VOTP2-LATCHOFF
tD_OTP2-LATCH
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
50 45 40 2.6 2.4 2.2
IDD-OP1 (mA)
35
IDD-ST (A)
30 25 20 15 10 5 0 -40 -25 -10 5 20 35 50 65 80 95 110 125
2 1.8 1.6 1.4 1.2 1 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( )
Temperature ( )
Figure 12. Startup Current (IDD-ST) vs. Temperature
18 17.5 17 16.5 16 15.5 15 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 13. Operation Supply Current (IDD-OP1) vs. Temperature
11 10.5 10
VDD-OFF (V)
VDD-ON (V)
9.5 9 8.5 8 7.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( )
Temperature ( )
Figure 14. Start Threshold Voltage (VDD-ON) vs. Temperature
10
Figure 15. Minimum Operating Voltage (VDD-OFF) vs. Temperature
7 6 5 4 3 2 1
8
IHV (mA)
6
4
2
0 -40 -25 -10 5 20 35 50 65 80 95 110 125
IHV-LC (uA)
-40
-25
-10
5
20
35
50
65
80
95
110
125
Temperature ( )
Temperature ( )
Figure 16. Supply Current Drawn from HV Pin (IHV) vs. Temperature
69 68 67
Figure 17. HV Pin Leakage Current After Startup (IHV-LC) vs. Temperature
91 90.5 90 89.5 89 88.5 88
65 64 63 62 61 60 59 -40 -25 -10 5 20 35 50 65 80 95 110 125
DCYMAX (%)
66
fOSC (KHz)
-40
-25
-10
5
20
35
50
65
80
95
110
125
Temperature ( )
Temperature ( )
Figure 18. Frequency in Normal Mode (fOSC) vs. Temperature
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1 10
Figure 19. Maximum Duty Cycle (DCYMAX) vs. Temperature
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
6 5.5 5 4.5 4 3.5 3 -40 -25 -10 5 20 35 50 65 80 95 110 125 300 285 270 255
VFB-OLP (V)
tD-OLP (ms)
240 225 210 195 180 165 150 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( )
Temperature ( )
Figure 20. FB Open-Loop Trigger Level (VFB-OLP) vs. Temperature
27
Figure 21. Delay Time of FB Pin Open-Loop Protection (tD-OLP) vs. Temperature
120 115
26
110 105
VDD-OVP (V)
25
IRT (A)
-40 -25 -10 5 20 35 50 65 80 95 110 125
100 95 90 85 80 75
24
23
70 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( )
Temperature ( )
Figure 22. VDD Over-Voltage Protection (VDD-OVP) vs. Temperature
1.2
Figure 23. Output Current from RT Pin (IRT) vs. Temperature
0.9
1.1
0.8
1
VOTP2 (V)
-40 -25 -10 5 20 35 50 65 80 95 110 125
VOTP (V)
0.7
0.9
0.6
0.8
0.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( )
Temperature ( )
Figure 24. Over-Temperature Protection Threshold Voltage (VOTP) vs. Temperature
124 122 120 118 116 114 112 110 108 106 104 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 25. Over-Temperature Protection Threshold Voltage (VOTP2) vs. Temperature
120 118 116 114 112 110 108 106 104 102 100 98 96 94 92 90 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( )
VIN-OFF (V)
VIN-ON (V)
Temperature ( )
Figure 26. Brown-In (VIN-ON) vs. Temperature
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1 11
Figure 27. Brownout (VIN-OFF) vs. Temperature
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Operation Description
Startup Current
For startup, the HV pin is connected to the line input through an external diode and resistor, RHV, (1N4007 / 200K recommended). Peak startup current drawn from the HV pin is (VAC x 2 )/RHV and charges the hold-up capacitor through the diode and resistor. When the VDD capacitor level reaches VDD-ON, the startup current switches off. At this moment, the VDD capacitor only supplies the FAN6747 to maintain the VDD before the auxiliary winding of the main transformer provides the operating current.
Short-Circuit Protection (SCP)
This protection is used to handle the huge output demand if the power supply output is suddenly shorted to ground. If VDD drops under 10V and the sensed voltage is higher than the limited threshold voltage, SCP is triggered and PWM output is latched off. This latch condition is reset only if VDD is discharged under 4V or by unplugging AC power line.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at 16.5V and 9V, respectively. During startup, the hold-up capacitor must be charged to 16.5V through the startup resistor to enable the IC. The hold-up capacitor continues to supply VDD before the energy can be delivered from auxiliary winding of the main transformer. VDD must not drop below 9V during startup. This UVLO hysteresis window ensures that the hold-up capacitor is adequate to supply VDD during startup.
Operating Current
Operating current is around 2mA. The low operating current enables better efficiency, power saving, and reduces the requirement of VDD hold-up capacitance.
Green-Mode Operation
The proprietary green-mode function provides off-time modulation to reduce the switching frequency in lightload and no-load conditions. VFB, which is derived from the voltage feedback loop, is taken as the reference. Once VFB is lower than the threshold voltage, switching frequency is continuously decreased to the minimum green-mode frequency of around 22KHz.
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on spike occurs on the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and can not switch off the gate driver.
Two-Level Over-Current Protection (OCP)
The cycle-by-cycle current limiting shuts down the PWM immediately when the sense voltage is over the limited threshold voltage (0.825V at low line). Additionally, when the sense voltage is higher than the OCP threshold (0.48V at low line), the internal counter counts for 220ms, then latches off PWM. When OCP occurs, PWM output is turned off and VDD begins decreasing. When VDD goes below the turn-off threshold (~9V), the controller is totally shut down. VDD continues to discharge below VDD-OLP by IDD-OLP. Then VDD is charged up to the turn-on threshold voltage of 16.5V through the startup resistor. When VDD is charged to 16.5V, it cycles again. This phenomenon is called two-level UVLO.
Gate Output / Soft Driving
The BiCMOS output stage is a fast totem-pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 13.5V Zener diode to protect power MOSFET transistors against undesirable gate over voltage. A soft driving waveform is implemented to minimize EMI.
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection is built in to prevent damage due to abnormal conditions. If the VDD voltage is over the over-voltage protection voltage (VDD-OVP) and lasts for tD-OVP, the PWM pulses are disabled until the VDD voltage drops below 4V, then restarts again.
Brownout and Constant Power Limited HV Pin
Unlike previous PWM controllers, FAN6747's HV pin isn't only used for startup; it can also detect the AC line voltage to perform brownout function and set the current limit level. Through a fast diode and startup resistor to sample the AC line voltage, the peak value refreshes and stores in register at each sampling cycle. When internal update time is met, this peak value is used to for brownout and current-limit level judgment. Equations 1 and 2 can be used to calculate out the level of brown-in or brownout converted to RMS value. For power saving, FAN6747 enlarges the sampling cycle to lower the power loss from HV sampling at light-load condition.
RHV + 1.6 )/ 2 1.6 R + 1 .6 VAC -OFF (RMS ) = (0.81x HV )/ 2 1.6 V AC -ON (RMS ) = (0.9 x
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
Soft-Start
For many applications, it is necessary to minimize the inrush current at startup. The built-in 8ms soft-start circuit significantly reduces the startup current spike and output voltage overshoot.
(1) (2)
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Built-In Slope Compensation
The sensed voltage across the current-sense resistor is used for peak-current-mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillation. FAN6747 inserts a synchronized, positive-going, ramp at every switching cycle.
Over-Temperature Protection (OTP)
A NTC thermistor, RNTC, in series with a resistor, RA, is connected from the RT pin to GND pin. A constant current IRT is output from this pin. The voltage of the RT pin can be expressed as VRT = IRT * (RNTC + RA), where IRT is 100A, the headroom of VRT is limited at around 5V by internal circuitry. As high ambient temperatures occur, RNTC is smaller, such that the VRT decreases. When VRT is less than 1.05V(VOTP) but over 0.7V, the PWM turns off after tD_OTP-LATCH. The other threshold, VDD under 0.7V, is used for fast shut down of FAN6747 after a short time.
Constant Output Power Limit
When the SENSE voltage across sense resistor RS reaches the threshold voltage, the output GATE drive is turned off after a small delay, tPD. This delay introduces an additional current proportional to tPD * VIN / LP. Since the delay is nearly constant regardless of the input voltage VIN, higher input voltage results in a larger additional current and the output power limit is higher than under low input line voltage. To compensate this variation for a wide AC input range, a power-limiter is controlled by HV pin to solve the unequal power-limit problem. The power limiter is fed to the inverting input of the OCP comparator. This results in a lower current limit at high-line input than at low-line input.
Noise Immunity
Noise on the current sense or control signal may cause significant pulse-width jitter, particularly in continuousconduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the FAN6747, and increasing the power MOS gate resistance improve performance.
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
Physical Dimensions
5.00 4.80 3.81
8 5
A
0.65
B
6.20 5.80
4.00 3.80
1 4
1.75
5.60
PIN ONE INDICATOR
(0.33)
1.27
0.25
M
CBA
1.27
LAND PATTERN RECOMMENDATION
0.25 0.10 1.75 MAX
C 0.10 0.51 0.33 0.50 x 45 0.25 C
SEE DETAIL A
0.25 0.19
OPTION A - BEVEL EDGE
R0.10 R0.10
GAGE PLANE
0.36
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13
8 0 0.90 0.406
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
Figure 28. 8-Lead, Small Outline Integrated Circuit (SOIC) Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.0
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FAN6747 -- Highly Integrated Green-Mode PWM Controller
(c) 2009 Fairchild Semiconductor Corporation FAN6747 * Rev. 1.0.1
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